Progress in the area of neural signal processing has enabled rapid advances in neuroscience and brain-machine interfacing. Wavelets have already been studied for detection and compression of neural action potentials. Among the major challenges in realizing a practical brain-machine interface is the design of ultra-low power electronic circuits. This paper is a survey of our efforts at Polystim Neurotechnologies Lab in designing wavelet transform (WT) processors for neural recording implantable devices. We describe the issues and possible solutions in designing such processors. In particular, we elaborate on the design of discrete and continuous WT processors using digital and analog components, respectively. Our results show that a folded polyphase architecture can produce a low-area low-power digital implementation. Also, it is shown that a low-power implementation of continuous WT can highly benefit from log-domain filter design and CMOS transistors operated in the weak inversion regime.