Pushpa Publishing House

Journal Menu

Content

Volume 17 (2018)

Volume 16 (2016)

Volume 15 (2015)

Volume 14 (2015)

Volume 13 (2014)

Volume 12 (2014)

Volume 11 (2013)

Volume 10 (2013)

Volume 9 (2012)

Volume 8 (2012)

Volume 7 (2011)

Volume 6 (2011)

Volume 5 (2010)

Volume 4 (2010)

Volume 3 (2009)

Volume 2 (2008)

	Volume 2, Issue 3 Pg 201 - 284 (November 2008)
	Volume 2, Issue 2 Pg 97 - 199 (July 2008)
	Volume 2, Issue 1 Pg 1 - 96 (March 2008)

Volume 1 (2007)

Advances in Computer Science and Engineering

Advances in Computer Science and Engineering
Volume 2, Issue 2, Pages 165 - 187 (July 2008)

THE TOTAL SYSTEM RELIABILITIES FOR FAULT-TOLERANT SELF-RECONFIGURABLE ARRAY SYSTEMS
Tadayoshi Horita (Japan) and Itsuo Takanami (Japan)

Abstract:
This paper deals with two self-reconfigurable array systems, one of which uses E-1.5-track switches and the EAR (the efficient approximate reconfiguration method using random number generators) and the other uses 1.5-track switches and the EAM (the efficient approximate reconfiguration method). The effects of faults of tracks, switches, the EAR and the EAM as well as faults of processors to the system reliability are estimated and they are compared with each other. Here, for a self-reconfigurable redundant (array) system with additional circuits, the question arises whether the redundancy is really effective in terms of the total system reliability. The paper also gives the answer to this question for each system and shows that the answers are positive for each system. In addition, the conditions in which the faults of tracks, switches, the EAR and the EAM can be ignored compared to processor faults are given. These results are useful to design fault-tolerant processor arrays.

Keywords and phrases: mesh-connected processor arrays, run-time fault-tolerance, reconfiguration, 1.5-track switches, E-1.5-track switches.

Number of Downloads: 307 | Number of Views: 961